As the level of device integration rises, crystal defects near the surface of silicon wafers have a larger impact on the manufacturing yield of semiconductor devices. Therefore, a need exists for high-quality silicon wafers that are free of crystal defects. Such wafers have until now generally been obtained by processes that use epitaxial growth. Wafers known as “annealed wafers” have recently been developed, which are obtained by high-temperature treating (annealing) silicon wafers in an inert gas atmosphere to remove near-surface crystal defects.
However, there are a number of drawbacks to annealing treatment. A native oxide film is formed on the wafer surface prior to annealing, and in addition, boron deposits (e.g., BF3, B2O3, and the like) from the environment to which the wafer is exposed or from the chemical treatment for cleaning the wafer that is carried out prior to annealing are also present. When annealing is carried out in an inert gas atmosphere, the boron deposits diffuse into the wafer interior, increasing the near-surface boron concentration. As a result, the electrical characteristics in the surface near the active region of the semiconductor device change, lowering the manufacturing yield of the devices. Because it is extremely difficult to completely prevent the deposition of boron to the wafer surface during wafer fabrication, there has existed a desire for a method for eliminating boron contamination; that is, a method which prevents the boron concentration near the surface of the wafer from increasing as a result of annealing treatment.
To provide a uniform boron concentration near the wafer surface and also eliminate crystal defects, Japanese published unexamined application JP 2002-100634 discloses a method in which the silicon wafer is heat-treated in a hydrogen gas-containing atmosphere so as to remove deposited boron prior to removal of the native oxide film, then is heat-treated in an inert gas atmosphere. The hydrogen gas concentration in the atmosphere is preferably from 0.1% to the lower explosion limit of about 4%. However, even with the use of this prior-art method, the boron concentration in the surface of the annealed wafer tends to remain higher than the boron concentration in a bulk silicon, and so the outcome has not always been satisfactory.